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Intel Information Session
Wednesday, February 19, 2014, 05:30pm - 06:30pm

Intel  LTD Tech Talk / Info Session for  PhD Students

Date:
2/19/2014

Time:
5:30-6:30pm

- Pizza is on us!

Location:

Burdine Hall (BUR) 116

2505 University Ave. 78712

Dr. Reynolds will be conducting interviews Thursday, so please email your resume ahead of time to:  thomas.k.reynolds@intel.com if you are interested in full-time opportunities at Intel in LTD.

LTD (Logic Technology and Development Group) is hiring PhD Process Engineers for Process Development and Process Ramp/HVM.   Skill sets include hard science PhD background in:  Chemistry, Chemical Eng, Electrical Eng, Materials Science and Physics.

For more information on opportunities visit: intel.com/jobs/students.

 

Please join us for a presentation on Leading Edge Silicon Technology Development, hosted by Intel’s Thomas Reynolds. 

 

Thomas Reynolds is a process technology development engineering manager at Intel Corporation.  He has been with Intel’s Logic Technology Development Group since 2003.  Dr. Reynolds manages the 10nm process defect reduction group in PTD. PTD is the organization responsible for developing the latest generation process technology. 

Logic Technology Development (LTD) is within Intel’s Technology Manufacturing Group and is where silicon process and device technology is invented and ramped into high volume manufacturing.  We are located in Portland, Oregon.

Location: BUR 116